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[PATCH 3/7] Nested VMX: Force check ISR when L2 is running

 

 

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yang.z.zhang at intel

Aug 9, 2013, 1:49 AM

Post #1 of 5 (19 views)
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[PATCH 3/7] Nested VMX: Force check ISR when L2 is running

From: Yang Zhang <yang.z.zhang [at] Intel>

If L2 is running, external interrupt is allowed to notify CPU only
when it has higher priority than current in servicing interrupt. Since
there is no vAPIC-v for L2, so force check isr when L2 is running.

Signed-off-by: Yang Zhang <yang.z.zhang [at] Intel>
---
xen/arch/x86/hvm/vlapic.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index 20a36a0..f2594dd 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -37,6 +37,7 @@
#include <asm/hvm/io.h>
#include <asm/hvm/support.h>
#include <asm/hvm/vmx/vmx.h>
+#include <asm/hvm/nestedhvm.h>
#include <public/hvm/ioreq.h>
#include <public/hvm/params.h>

@@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
if ( irr == -1 )
return -1;

- if ( vlapic_virtual_intr_delivery_enabled() )
+ if ( vlapic_virtual_intr_delivery_enabled() &&
+ !nestedhvm_vcpu_in_guestmode(v) )
return irr;

isr = vlapic_find_highest_isr(vlapic);
--
1.7.1


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andrew.cooper3 at citrix

Aug 9, 2013, 3:38 AM

Post #2 of 5 (17 views)
Permalink
Re: [PATCH 3/7] Nested VMX: Force check ISR when L2 is running [In reply to]

On 09/08/13 09:49, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang [at] Intel>
>
> If L2 is running, external interrupt is allowed to notify CPU only
> when it has higher priority than current in servicing interrupt. Since
> there is no vAPIC-v for L2, so force check isr when L2 is running.
>
> Signed-off-by: Yang Zhang <yang.z.zhang [at] Intel>
> ---
> xen/arch/x86/hvm/vlapic.c | 4 +++-
> 1 files changed, 3 insertions(+), 1 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
> index 20a36a0..f2594dd 100644
> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/hvm/vlapic.c
> @@ -37,6 +37,7 @@
> #include <asm/hvm/io.h>
> #include <asm/hvm/support.h>
> #include <asm/hvm/vmx/vmx.h>
> +#include <asm/hvm/nestedhvm.h>
> #include <public/hvm/ioreq.h>
> #include <public/hvm/params.h>
>
> @@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
> if ( irr == -1 )
> return -1;
>
> - if ( vlapic_virtual_intr_delivery_enabled() )
> + if ( vlapic_virtual_intr_delivery_enabled() &&
> + !nestedhvm_vcpu_in_guestmode(v) )

Alignment, but otherwise ok.

~Andrew

> return irr;
>
> isr = vlapic_find_highest_isr(vlapic);


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JBeulich at suse

Aug 9, 2013, 5:12 AM

Post #3 of 5 (16 views)
Permalink
Re: [PATCH 3/7] Nested VMX: Force check ISR when L2 is running [In reply to]

>>> On 09.08.13 at 10:49, Yang Zhang <yang.z.zhang [at] intel> wrote:
> From: Yang Zhang <yang.z.zhang [at] Intel>
>
> If L2 is running, external interrupt is allowed to notify CPU only
> when it has higher priority than current in servicing interrupt.

That's always this way, not just for nested HVM. Hence there
must either be some piece missing from this explanation, or
the check is being inserted in the wrong place.

Jan

> Since
> there is no vAPIC-v for L2, so force check isr when L2 is running.
>
> Signed-off-by: Yang Zhang <yang.z.zhang [at] Intel>
> ---
> xen/arch/x86/hvm/vlapic.c | 4 +++-
> 1 files changed, 3 insertions(+), 1 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
> index 20a36a0..f2594dd 100644
> --- a/xen/arch/x86/hvm/vlapic.c
> +++ b/xen/arch/x86/hvm/vlapic.c
> @@ -37,6 +37,7 @@
> #include <asm/hvm/io.h>
> #include <asm/hvm/support.h>
> #include <asm/hvm/vmx/vmx.h>
> +#include <asm/hvm/nestedhvm.h>
> #include <public/hvm/ioreq.h>
> #include <public/hvm/params.h>
>
> @@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
> if ( irr == -1 )
> return -1;
>
> - if ( vlapic_virtual_intr_delivery_enabled() )
> + if ( vlapic_virtual_intr_delivery_enabled() &&
> + !nestedhvm_vcpu_in_guestmode(v) )
> return irr;
>
> isr = vlapic_find_highest_isr(vlapic);
> --
> 1.7.1




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yang.z.zhang at intel

Aug 10, 2013, 7:49 PM

Post #4 of 5 (13 views)
Permalink
Re: [PATCH 3/7] Nested VMX: Force check ISR when L2 is running [In reply to]

Jan Beulich wrote on 2013-08-09:
>>>> On 09.08.13 at 10:49, Yang Zhang <yang.z.zhang [at] intel> wrote:
>> From: Yang Zhang <yang.z.zhang [at] Intel>
>>
>> If L2 is running, external interrupt is allowed to notify CPU only
>> when it has higher priority than current in servicing interrupt.
>
> That's always this way, not just for nested HVM. Hence there must
> either be some piece missing from this explanation, or the check is
> being inserted in the wrong place.
How about change the comments like this:
External interrupt is allowed to notify CPU only when it has higher priority than current in servicing interrupt. With APIC-v, the priority comparing is done by hardware and hardware will inject the interrupt to VCPU when it recognizes an interrupt. Currently, there is no virtual APIC-v feature available for L1, so when L2 is running, we still need to compare interrupt priority with ISR in hypervisor instead hardware.


> Jan
>
>> Since
>> there is no vAPIC-v for L2, so force check isr when L2 is running.
>>
>> Signed-off-by: Yang Zhang <yang.z.zhang [at] Intel>
>> ---
>> xen/arch/x86/hvm/vlapic.c | 4 +++-
>> 1 files changed, 3 insertions(+), 1 deletions(-)
>> diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
>> index 20a36a0..f2594dd 100644
>> --- a/xen/arch/x86/hvm/vlapic.c
>> +++ b/xen/arch/x86/hvm/vlapic.c
>> @@ -37,6 +37,7 @@
>> #include <asm/hvm/io.h> #include <asm/hvm/support.h> #include
>> <asm/hvm/vmx/vmx.h> +#include <asm/hvm/nestedhvm.h> #include
>> <public/hvm/ioreq.h> #include <public/hvm/params.h>
>> @@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v)
>> if ( irr == -1 )
>> return -1;
>> - if ( vlapic_virtual_intr_delivery_enabled() )
>> + if ( vlapic_virtual_intr_delivery_enabled() &&
>> + !nestedhvm_vcpu_in_guestmode(v) )
>> return irr;
>> isr = vlapic_find_highest_isr(vlapic);
>> --
>> 1.7.1
>
>


Best regards,
Yang



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JBeulich at suse

Aug 11, 2013, 11:47 PM

Post #5 of 5 (2 views)
Permalink
Re: [PATCH 3/7] Nested VMX: Force check ISR when L2 is running [In reply to]

>>> On 11.08.13 at 04:49, "Zhang, Yang Z" <yang.z.zhang [at] intel> wrote:
> Jan Beulich wrote on 2013-08-09:
>>>>> On 09.08.13 at 10:49, Yang Zhang <yang.z.zhang [at] intel> wrote:
>>> From: Yang Zhang <yang.z.zhang [at] Intel>
>>>
>>> If L2 is running, external interrupt is allowed to notify CPU only
>>> when it has higher priority than current in servicing interrupt.
>>
>> That's always this way, not just for nested HVM. Hence there must
>> either be some piece missing from this explanation, or the check is
>> being inserted in the wrong place.
> How about change the comments like this:
> External interrupt is allowed to notify CPU only when it has higher priority
> than current in servicing interrupt. With APIC-v, the priority comparing is
> done by hardware and hardware will inject the interrupt to VCPU when it
> recognizes an interrupt. Currently, there is no virtual APIC-v feature
> available for L1, so when L2 is running, we still need to compare interrupt
> priority with ISR in hypervisor instead hardware.

Yes, that would make things quite a bit more clear.

Jan


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