obsidian at panix
May 2, 2005, 1:49 PM
Post #8 of 10
(1639 views)
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Re: "Cell Microprocessor Simultaneously Decoding 48 MPEG-2 Streams"
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Please correct me if I have this wrong: the changes in cell are more than
just skin deep - more, even, than just adding multiple functional units
and interconnects. I think it's appropriate to say that cell represents a
kind of philosophical shift.
There are some readable background papers out now, for instance:
http://www.blachford.info/computer/Cells/Cell0.html
As an example, the cell approach to caching is radically different.
Your CPU does a lot of complex run-time guesswork with hard-wired
heuristics about how to best organize your code in the different tiers of
memory resources available. Cache misses can stall the CPU for long
periods; effective utilization of various cache levels is instrumental to
performance, yet your interaction with caching mechanisms is weak or
non-existent. We typically rely on the CPU to know what to do, or at best
give it hints. Many important performance gains in the PC are tied to this
"magic CPU" approach. We always expect new machines to run old code (and
for that matter, old binaries) faster.
The cell, at last, switches directions. Probably of necessity. Grid
computing makes these problems perhaps too difficult to want to solve with
such a great reliance on the hardware. The "APU" has no cache in the
traditional sense. It has a "local memory," and your code (or your
compiler, or your OS, or some interesting combination thereof) manages
that.
Virtual Memory hardware, as you know it, isn't present in cell. There is
something, of course, but it's different. Apparently, it's simpler, and
thus faster.
Though in many ways it's just a continuation of the RISC approach of
pushing complexity from the silicon to the software. Software has to do
more work, especially the compiler, but the changes reverberate all the
way up the stack. On the other hand, if you are willing to do the work,
you can win more performance.
On a $50 million video game project, they are willing to do the work. :)
On Mon, 2 May 2005, Devan Lippman wrote:
> The CELL is a RISC CPU, why would you want to emulate x86? What I was
> saying tho was that its based off the power 5 instruction set if I'm
> not mistaken and shouldn't take much to port to (it'll prolly get done
> faster than I can get my hands on one).
>
> --
> Thanks,
> Devan Lippman <devan[at]lippman.net>
>
>
> On 5/2/05, Robert Johnston <anaerin[at]gmail.com> wrote:
>> On 5/2/05, Devan Lippman <devan.lippman[at]gmail.com> wrote:
>>> I hope I can get one of these as the CPU for my machine! Been a while
>>> since I read that explination but I think that its a series of power
>>> CPUs arranged similar to a beowulf cluster all on one chip which means
>>> it shouldn't be too far off from existing CPUs that linux will run on
>>> in the final presentation to the system.
>>> Interesting that they have a screenshot of the demo being replayed in
>>> windows media player and not the original demo... still I LOVE SMP and
>>> this should have the potential to kill current SMP, AMD and INTEL
>>> Multicore all in one hit.
>>
>> Well, yes, but think of the cost.
>>
>> Chances are running Dual Dual-core Opteron will be much better "Bang
>> for your buck" than getting a Cell system and having to write an x86
>> emulator, or porting the entire OS to Cell's instruction set
>> --
>> Robert "Anaerin" Johnston
>>
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