peter at stuge
Dec 7, 2010, 6:42 PM
Post #7 of 11
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wireless wrote:
> It's a SOC so I sure things could be reshuffled to get a
> sata bus interface. Dropping the video is an excellent idea
> for a mini server!
Cool idea! I guess it might require TI to spin a new chip though.
> > And using a mechanical device in a mobile project is a bad idea. SSDs
> > sure, but they are only an afterthought since many devices already use
> > hard drives. If making a new platform or a new device, then best not
> > go that route, better use the flash controller and some NAND.
>
> You've got to be kidding me? I posted on Gentoo user a few
> days ago (NOV 8th) about a netbook. The resounding number
> one issue is avoid SSD and get a mechanical HD!
> <from a pretty smart person>
> "Those SSDs are shite. Get a mechanical drive. 8G is also
> not enough and the write performance is pathetic. "
Hehe. I wonder how mobile that person was. :)
Like David I am pretty mobile sometimes, and I have destroyed more
than one mechanical drive with wear and tear on the road. Now I have
a fast $250 64GB CF card on a PATA adapter in my old laptop, and it
is significantly faster for reads than any mechanical drive that I
could get. Write performance is about the same as a desktop 3.5"
7200rpm drive. Not too bad, considering it's a machine from 2005.
A new high-end SSD is certainly not shite in my book.
But I would actually recommend against SSDs for an embedded system as
the general rule, including SD or CF cards and any other consumer
devices. The major reason is that all wear leveling is being done in
the device, and that may not at all fit the usage pattern of the
device. There's an advantage in being able to control the wear
leveling e.g. as part of a filesystem in the kernel.
And of course the interfaces and controllers need power, and maybe
the NAND flash controller inside the OMAP can not be powered down
completely.
> > Maybe someone will make a SATA daughterboard, but since there's no
> > PCI bus it would have to be based on one of the USB->SATA chipsets
> > which are all pretty crappy. It could certainly be done though.
>
> USB 3.0 maybe, usb2.0 no way I would go that route.
High-speed USB is 480Mbps on the wire. There is some overhead for the
bus, but >40Mbyte/s sustained data rate is certainly possible, even
without writing a kernel driver.
> Besides it just adds a layer of crap that is unnecessary....
The command set is ATA also for USB Mass Storage Class, so at least
it is only a matter of transport, rather than translation. I don't
think it's all too bad, except that the USB->SATA chipsets I've seen
are cheap and sad.
> >> Much of the information and docs are just too new
> >> to be complete.
> >
> > Most of TIs docs are nearly two years old.
>
> I see plenty of docs that are a few days/weeks old
> related to this panda board and TI's commitment to
> OMAP and open source BSPs.
Ah yes, the pandaboard is new, that's very true. But since the chip
has been documented for a while I guess it can be considered rather
stable.
> Hmn. I think this board will get re-spun loosing the video
> and adding a sata port(s) and connectors (as you have
> pointed out).
Except the chip probably does not have SATA controller logic.
But maybe TI will make one. Again, yes, cool idea!
Maybe someone like Marvell who are already doing SATA controllers
will/do have an Cortex-A chip with SATA?
Hits from Google cortex-a9 sata:
Samsung Orion
http://www.samsung.com/global/business/semiconductor/newsView.do?news_id=1195
"Taipei, Taiwan - September 7, 2010 : Samsung Electronics Co., Ltd.,
a world leader in advanced semiconductor solutions, today introduced
its new 1GHz ARM® CORTEX™ A9-based dual-core application processor,
codenamed Orion, for advanced mobile applications."
..
"For example, with this processor, customers have the choice to use
different types of storage including NAND flash, moviNANDâ„¢, SSD or
HDD providing both SATA, and eMMC interfaces."
ST SPEAr1310
http://www.st.com/internet/mcu/product/250658.jsp
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00274166.pdf
Dual-core Cortex A9 embedded MPU for communications
CPU subsystem:
– 2x ARM Cortex A9 cores, up to 600 MHz
..
Connectivity:
– 2x Giga/Fast Ethernet ports (for external GMII/RGMII/MII PHY)
– 3x Fast Ethernet (for external SMII/RMII PHY)
– 3x PCIe 2.0 links (embedded PHY)
– 3x SATA gen-2 host port
– 1x 32-bit PCI expansion bus (up to 66 MHz)
– 2x USB 2.0 host ports with integrated PHYs
– 1x USB2.0 OTG port with integrated PHY
– 2x CAN 2.0 a/b interfaces
– 2x TDM/E1 HDLC controllers with 256/32 time slots per frame respectively
– 2x HDLC controllers for external RS485 PHYs
– 2x I2S ports for external audio/modem
– 6x UARTs (up to 5 Mbaud)
– 1x SSP port (SPI and other protocols), master/slave, up to 41 Mbps
– 2x I2C ports master/slave
I guess the Samsung device is a little further into the future, but
also more powerful.
//Peter
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